The present invention relates, in general, to contact etch processes and, more particularly, to sloped contact etch processes.
Dynamic random access memory (DRAM) semiconductor devices and static random access memory (SRAM) semiconductor devices typically include an insulating layer of a dielectric material to electrically separate one conductive layer from another. Often, the two conductive layers are connected by means of a hole, commonly known as a xe2x80x9ccontactxe2x80x9d or xe2x80x9cvia,xe2x80x9d in the insulating layer. Sometimes the via must have a sloped or faceted profile to provide proper step coverage of appropriate thickness of the conductive layer. Vertical contact profiles often result in unacceptable step coverage and excessively sloped profiles provide good step coverage but result in highly enlarged vias. Enlarged vias may cause electrical shorting between or within conductive layers and may also reduce the density of the circuit features by limiting the proximity of the devices. Thus, providing an adequate contact slope is critical to achieving acceptable contact step coverage.
U.S. Pat. No. 5,320,981 to Blalock describes a process for forming a sloped via. In this process, a photoresist mask is used to define an etch area on a dielectric layer. The dielectric layer is etched either isotropically or anisotropically to expose an underlying conductive layer. After the dielectric layer has been etched, the photoresist mask is removed and a second etch is performed. This second etch is a plasma etch and is conducted with a material, such as argon, krypton or xenon, so that as close as possible to a purely physical, as opposed to chemical, erosion takes place. The second etch forms a facet in the side walls of the via and redeposits the eroded dielectric material onto the opposite side wall.
However, when a photoresist material is used during etching of a via, particles of the photoresist material become deposited in the resulting via and on the conductive material. These particles of photoresist material affect the subsequent step coverage and the resulting conductivity of the semiconductor device. Further, plasma etching of a material is not a selective process and in the case of facet etching, portions of the semiconductor device other than the portion being facet etched may be damaged. Thus, a need still exists in the art for a process for forming a semiconductor devices having a gradual slope contact.
The present invention meets the current needs in the art by providing a method for forming semiconductor devices having gradual slope contacts. The present invention also provides a variety of semiconductor devices having gradual slope contacts.
One aspect of the present invention is directed to a method for making a semiconductor device precursor. The method comprises the steps of: forming a layer of conductive material in a first layer; forming a layer of a hard mask material onto at least a portion of the first layer; etching the layer of hard mask material to expose a portion of the first layer; forming facets on the layer of hard mask material; and forming a via in the first layer such that the via extends through the first layer to expose at least a portion of the layer of conductive material.
Another aspect of the present invention is directed to a method for forming a semiconductor device precursor. The method comprises the steps of: forming a layer of conductive material in a first layer; forming a layer of a hard mask material onto at least a portion of the first layer; forming a layer of etch resistant material on the layer of hard mask material; patterning the layer of etch resistant material; etching the layer of hard mask material to expose at least a portion of the first layer; forming facets on the layer of hard mask material; and forming a via in the first layer such that the via extends through the first layer to expose at least a portion of the layer of conductive material.
Still another aspect of the present invention is directed to a method for forming a semiconductor device precursor. The method comprises the steps of: forming a layer of conductive material in a first layer; forming a layer of a hard mask material onto at least a portion of the first layer; forming a layer of etch resistant material on the hard mask material; patterning the layer of etch resistant material; etching the layer of hard mask material to expose at least a portion of the first layer and to form opposing sidewalls in at least a portion of the first layer; bombarding the hard mask material with an ion source to form facets; depositing a portion of the material removed from the layer of hard mask material on opposite sidewalls of the first layer; forming a via in the first layer such that the via extends through the first layer to expose at least a portion of the layer of conductive material.
Yet another aspect of the present invention is directed to a method for forming a semiconductor device. The method comprises the steps of: forming a layer of conductive material in a first layer; forming a layer of a hard mask material onto at least a portion of the first layer; etching the layer of hard mask material to expose at least a portion of the first layer and to provide the hard mask material with facets; forming a via in the first layer such that the via extends through the first layer to expose at least a portion of the layer of conductive material; and forming a metal interconnect in the via, the metal interconnect contacting at least a portion of the layer of conductive material.
A further aspect of the present invention is directed to a semiconductor device precursor having a gradual slope contact formed by the method comprising the steps of: forming a layer of conductive material in a first layer; forming a layer of a hard mask material onto at least a portion of the first layer; etching the layer of hard mask material to expose a portion of the first layer; forming gradual slope contact on the layer of hard mask material; and forming a via in the first layer, the via extending through the first layer to expose at least a portion of the layer of conductive material.
Another aspect of the present invention is directed to a semiconductor device precursor having a gradual slope contact formed by the method comprising the steps of: forming a layer of conductive material in a first layer; forming a layer of a hard mask material onto at least a portion of the first layer; forming a layer of etch resistant material on the layer of hard mask material; patterning the layer of etch resistant material; etching the layer of hard mask material to expose at least a portion of the first layer; forming gradual slope contact on the layer of hard mask material; and forming a via in the first layer, the via extending through the first layer to expose at least a portion of the layer of conductive material.
Still another aspect of the present invention is directed to a semiconductor device precursor having a gradual slope contact formed by the method comprising the steps of: forming a layer of conductive material in a first layer; forming a layer of a hard mask material onto at least a portion of the first layer; forming a layer of etch resistant material on the hard mask material; patterning the layer of etch resistant material; etching the layer of hard mask material to expose at least a portion of the first layer and to form opposing sidewalls in at least a portion of the first layer; bombarding the hard mask material with an ion source to form a gradual slope contact; depositing a portion of the material removed from the layer of hard mask material on opposite sidewalls of the first layer; forming a via in the first layer, the via extending through the first layer to expose at least a portion of the layer of conductive material.
Yet another aspect of the present invention is directed to a semiconductor device having a gradual slope contact formed by the method comprising the steps of: forming a layer of conductive material in a first layer; forming a layer of a hard mask material onto at least a portion of the first layer; etching the layer of hard mask material to provide the hard mask material with a gradual slope contact; forming a via in the first layer, the via extending through the first layer to expose at least a portion of the layer of conductive material; and forming a metal interconnect in the via, the metal interconnect contacting at least a portion of the layer of conductive material.
A further aspect of the present invention is directed to a method for making a semiconductor device having a gradual slope contact comprising the steps of: forming a layer of dielectric material on a substrate, wherein the dielectric material is selected from the group consisting of silicon oxide, silicon nitride and polyimide film and wherein the substrate is selected from the group consisting of aluminum, copper and polycrystalline silicon; forming a layer of conductive material within the layer of dielectric material, the layer of conductive material being surrounded by the layer of dielectric material; depositing a layer of hard mask material on the layer of dielectric material, the hard mask material being selected from the group consisting of tungsten, tungsten silicide, polycrystalline silicon, titanium, titanium nitride, titanium silicide and titanium-tungsten alloys; forming a photoresist layer on the layer of hard mask material; exposing the photoresist layer to form a pattern on the photoresist layer; etching the layer of hard mask material according to the pattern on the photoresist layer to expose the layer of dielectric material and to form sidewalls in the exposed portion of the layer of dielectric material; removing the photoresist layer; anisotropically etching the layer of hard mask with an inert material to form gradual slope contact on the layer of hard mask material; depositing the hard mask material removed by the anisotropic etching onto the sidewalls of the exposed layer of dielectric material to form a gradual slope contact; etching the dielectric material to expose a portion the conductive layer; and forming a metal interconnect with the exposed portion of the conductive layer, wherein the metal which forms the metal interconnect is selected from the group consisting of aluminum, copper, gold, aluminum-titanium alloys and aluminum-copper alloys.
A further aspect of the present invention is directed to a semiconductor device precursor. The semiconductor device precursor includes a substrate. A layer of dielectric material is formed on at least a portion of the substrate. A layer of conductive material is formed within the layer of dielectric material so that the layer of conductive material contacts at least a portion of the substrate. A layer of hard mask material is formed on at least a portion of the layer of dielectric material. The layer of hard mask material has a pair of facets formed therein by anisotropic etching. The facets and the layer of dielectric material define a via which exposes at least a portion of the layer of conductive material.
A still further aspect of the present invention is directed to a semiconductor device. The semiconductor device includes a substrate. A layer of dielectric material is formed on at least a portion of the substrate. A layer of conductive material is formed within the layer of dielectric material such that the layer of conductive material contacts at least a portion of the substrate. A layer of hard mask material is formed on at least a portion of the layer of dielectric material. The layer of hard mask material has facets formed therein by anisotropic etching. The facets and the layer of dielectric material define a via which exposes at least a portion of the layer of conductive material. Finally, an interconnect material is formed in the via.
Accordingly, it is an object of the present invention to provide a method for forming a semiconductor having a gradual slope contact which increases the step coverage and resulting conductivity of the semiconductor device. Other objects and advantages of the invention will be apparent from the following detailed description, the accompanying drawings and the appended claims.